Hacker Newsnew | past | comments | ask | show | jobs | submit | mupuf's commentslogin

Thanks for the feedback, everyone!

I fixed up quite a few things based on it! I'll keep on working on the code and hopefully will have some more tangible to share at the end of the summer :)


My understanding was that open hardware stood for "open PCB design", with the idea that a community could be made around it to improve the design for later revisions.

Open toolchains are another topic, and indeed, Lattice FPGAs are now super attractive because of it! Hopefully, project X-Ray will bear fruits soon and I can ditch Vivado, at least during development!

In the end, a hardware design using Lattice or Xilinx FPGAs is not more or less open. Discrete components will always be proprietary (unless your name is Sam Zeloof). What matters is pushing the boundary further and further, and for this, FPGAs are amazing!


Open Source Hardware is not limited to just the PCB design.

Here is an excerpt from the definition provided by OSHWA [1]:

> Open Source Hardware (OSHW) is a term for tangible artifacts — machines, devices, or other physical things — whose design has been released to the public in such a way that anyone can make, modify, distribute, and use those things.

Wikipedia's article on Open-source hardware has the following statement [2]:

> Hardware design (i.e. mechanical drawings, schematics, bills of material, PCB layout data, HDL source code and integrated circuit layout data), in addition to the software that drives the hardware, are all released under free/libre terms.

I don't want to speak for anyone else, but my hope is that the ecosystem around FPGAs, including the VHDL/Verilog, toolchain, design and manufacture, will all be free/libre so that the underlying chips will be treated as commodity. Even if the chips themselves need massive infrastructure to create, if they're treated more like a fungible commodity then we could see 'clones' pop up and not be so dependent on a select few companies.

In terms of DIY manufacture, I think Sam Zeloof has been doing some "Homemade Silicon ICs" [3] but I don't have a good sense if that will ever catch on or be within reach of the average hobbyist.

Maybe a bit off-topic but @ico_TC has this to say on Twitter about it [4]:

> I had discussions with 4 different FPGA vendors. For them it does not make sense to invest cash in improving the open source toolchain, as it does not sell enough additional chips to justify the cash investment.

[1] https://www.oshwa.org/definition/

[2] https://en.wikipedia.org/wiki/Open-source_hardware

[3] https://www.youtube.com/watch?v=XrEC2LGGXn0

[4] https://twitter.com/ico_TC/status/1269155001999507456


Thanks for your write-up!

In the case of FPGA boards, OSHW would thus require "mechanical drawings, schematics, bills of material, PCB layout data, and integrated circuit layout data" given that no HDL source code is present in it.

Seems like I have been a little loose in my description, but at least I did not completely miss the point. Accuracy is however needed, I'll try to find another formulation or link to the pages you sent for people to see that it is a little more complex!


I think you're being pretty ungenerous in your reading.

Under the section "3. Necessary Software":

> If the licensed design requires software, embedded or otherwise, to operate properly and fulfill its essential functions, then the license may require that one of the following conditions are met:

> a) The interfaces are sufficiently documented such that it could reasonably be considered straightforward to write open source software that allows the device to operate properly and fulfill its essential functions. For example, this may include the use of detailed signal timing diagrams or pseudocode to clearly illustrate the interface in operation.

> b) The necessary software is released under an OSI-approved open source license.

My interpretation of that would include HDL source code.


Yeah, I definitely jumbled both in the same basket. I should rename that into "higher-level languages" and introduce both HLS and HDL there.

Thanks for the feedback, I'll make some changes to clarify my thoughts!


Thanks for the links. I'll make sure to check them out in details!


Sorry about that, the project is still very early. Check out the fan_wip branch for actual code.

The point of LiteDIP is to provide both the IPs, and their drivers.

Also, rather than needing IPs to be located at a certain address in any sort of bus (PCI BARs, wishbone, ...), litedip exposes the list of IPs starting at address 0 along with their version and relative address.

The driver then lists these blocks, and either has a driver for this block's version or not.


Consider applying for YC's Summer 2026 batch! Applications are open till May 4

Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: