I wonder if it's possible to just interleave statements from k different (loop) functions? Then it would seem mostly equivalent to an arduino at 1/k Clock speed.
I think it's not possible to interleave instructions per se (because of registers?), but a compiler should be able to figure out the correct instructions of statement interleaving.
You can do that, but it's not very useful in practice and really breaks down when you want to do something more compute intensive that needs all the registers/cache. Multicore MCUs like the ESP32 are pretty cheap ($2 1pc pricing) so if you really care about realtime performance it makes more sense it do realtime on one core and schedule slower work to be done on the other core.
Padauk makes them (or at least did), and calls them FPPAs. These are the same folks that brought you those infamous 3-cent-at-single-quantities OTP microcontrollers, so they're probably not for the faint of heart, but what you're asking for has been done.
Some of those 3 cent microcontrollers are actually barrel processors! They have multiple sets of registers (only two on the cheapest) and rotate through them with each clock. Useful for implementing an SPI or UART thread alongside the main task, for example.
The SDCC open source C compiler targets some of those chips now, too.
I think it's not possible to interleave instructions per se (because of registers?), but a compiler should be able to figure out the correct instructions of statement interleaving.
This should eliminate problems with blocking.