Memory caching will accelerate all requests through the memory controller. The extra 64MB of L3 in my 5800X3D wouldn't accelerate DMA between my memory and my GPU, this HBM cache should accelerate PCI-e devices like GPUs and Storage.
It's a benefit in 2 socket configurations when the memory the CPU needs is connected to another socket. The data will be cached on the other socket's HBM for the entire system without filling up that other socket's L1-L3 cache for data it hasn't requested yet.
It's a benefit in 2 socket configurations when the memory the CPU needs is connected to another socket. The data will be cached on the other socket's HBM for the entire system without filling up that other socket's L1-L3 cache for data it hasn't requested yet.
Another way to see it is the last time Intel messed around with L4 cache under the EDRAM section. https://www.anandtech.com/show/9582/intel-skylake-mobile-des...
The entire GPU and EDRAM complex get moved out of the CPU caching scheme.